Global supply stays ahead — by 2040 the world makes about 1891× the worldwide fleet’s need, so production never falls behind globally.
Verdict
Memory is, alongside steppers, one of the least binding components in this report, and the four-series model says so without hedging: on volume there is no crossover anywhere, global, China and the United States all stay far ahead of the worldwide fleet forever. Two facts settle it. First, a humanoid needs only a sliver of memory: about a LPDDR DRAM module plus a NAND storage module, roughly one and a half memory packages per robot1, so even a worldwide fleet of forty-seven million robots by 2040 needs only about seventy and a half million memory packages in total. Second, the memory industry already makes that many in a matter of hours: global DRAM capacity alone runs near two and a quarter million wafer-starts a month in 20255, which at hundreds-to-thousands of chips per wafer is tens of billions of memory chips, several billion finished packages a year, a roughly two-hundred-billion-dollar industry serving phones, PCs, servers and AI servers4. Run the gap and cumulative production banks hundreds to thousands of times the fleet’s need in every region: the global, China and US crossover years are all null14. So the real exposure here is not whether enough memory can be built, it overwhelmingly can, but concentration and grade: production is a Korea-led oligopoly (Samsung and SK Hynix) plus US-headquartered Micron and Japan’s Kioxia, with the DRAM “Big Three” holding about ninety-two to ninety-five percent6 and the top five in NAND about ninety percent7. China’s CXMT and YMTC are rising fast but remain small and U.S.-export-controlled89, and the United States makes almost no commodity memory domestically10. The one live pressure is macro, not robot-specific: memory is deeply cyclical and AI is eating the wafer base, with contract DRAM prices up more than half in a single quarter13, but humanoids use the most elastic, least-contended tier, commodity LPDDR, not the scarce HBM that datacenter GPUs fight over3. Treat memory as a control-and-pricing question, not a volume chokepoint.
What it is
Memory is the working and storage silicon a robot carries: DRAM (dynamic RAM, the fast working memory an on-board model runs inference from) and NAND flash (the non-volatile storage that holds the models, maps and logs). A humanoid’s compute platform is comparable to a high-end autonomous vehicle, Micron pegs that class at about three hundred gigabytes of DRAM plus substantial solid-state storage1, which is, in package terms, roughly one LPDDR DRAM module plus one NAND or SSD module, so the model uses about one and a half memory packages per robot (a value of 0.0015 in thousand-unit terms)2. Crucially, this is commodity LPDDR DRAM and NAND, the high-volume, low-margin tier: NVIDIA’s Jetson Thor humanoid-compute board ships one hundred and twenty-eight gigabytes of LPDDR5X, deliberately not the costly HBM that datacenter accelerators use3. That matters because LPDDR and NAND are the most elastic, least-contended part of the memory market, exactly the part where supply is deepest. Memory packages are also durable: once fitted, they stay in the robot for life, so the fleet’s need is a slowly-accumulating stock, not a per-year flow.
The fleet and the parts it needs
Because a memory package is built into a robot for life, the packages the fleet needs are a cumulative stock, the total number of robots ever built worldwide multiplied by about one and a half each1, not a per-year flow. Integrating the consensus shipment ramp14, the worldwide installed humanoid fleet reaches about five hundred and eighty-five thousand robots by 2030, ten million by 2035 and forty-seven million by 2040, requiring only roughly nine hundred thousand, fifteen million and seventy and a half million memory packages respectively. Hold those figures against an industry that ships several billion memory packages every single year5 and the scale is almost comic: the entire cumulative 2040 fleet need is a small fraction of a single day of world memory output. In the chart below the black line is that worldwide cumulative need and the grey band is cumulative global production, and the band sits so far above the line that no red shortfall wedge ever opens. That absence of a gap is the finding.
Who makes them, and how fast
Production is the only thing that differs between the Global, China and US views. The worldwide humanoid fleet and the memory it needs stay identical in all three; only the supply line changes, asking whether one bloc’s fabs alone could equip the whole global fleet. Here every bloc wins that contest by orders of magnitude. Global finished-memory output runs on the order of six billion packages a year today, anchored on the roughly two-hundred-billion-dollar 2025 market4 and a DRAM wafer base near two and a quarter million wafer-starts a month5, growing modestly to perhaps eleven billion by 2040. Unit counts grow far slower than bits: the bit supply expands about fifteen to twenty percent a year through node shrink and 3D-NAND layer stacking12, but the number of packages grows only a few percent a year as each device simply holds more memory. The supplier base is a tight oligopoly: in DRAM, SK Hynix, Samsung and Micron hold about ninety-two to ninety-five percent6; in NAND, Samsung, SK Hynix, Kioxia, Micron and SanDisk hold about ninety percent7. China climbs fastest from a small base, about seven hundred and twenty million packages a year today, roughly twelve percent of global production, toward a modeled three and a quarter billion by 2040: CXMT nearly tripled its DRAM wafer capacity from one hundred thousand to two hundred and ninety thousand wafer-starts a month between 2024 and 2025 and holds about eleven percent of global DRAM8, while YMTC reached about thirteen percent of NAND shipments9. But its rise is real and sanctioned, U.S. export controls cap its leading-edge tooling8, so it remains a small, constrained entrant, not a swing supplier. The United States is the weakest geography of all: it produced only about one-and-a-half percent of global DRAM and essentially no NAND10, and Micron is the only domestic memory maker, today just the legacy Manassas, Virginia DRAM fab, with new Idaho capacity arriving in 2027 and New York “megafabs” only around 2029 to 203011. So US output is thin, running from about sixty million packages a year toward three hundred million by 2040 as those fabs ramp. The post-2030 figures in every region are a modeled extrapolation of a mature, cyclical base, not a reported unit forecast.
When production falls behind
For every view, the answer is never. Cumulative global production stays hundreds-to-thousands of times above the fleet’s cumulative need at every year through the 2040 horizon, so there is no global crossover14: a single year of global output around 2040, some eleven billion packages5, is on its own roughly a hundred and fifty times the entire cumulative seventy-and-a-half-million-package need of the 2040 fleet. China-only never falls behind either: even its roughly twelve-percent slice produces billions of packages a year, hundreds of times the fleet need on its own8. And, unusually for a component where the United States is the weakest producer, even the thin US-only niche never crosses: at about sixty to three hundred million packages a year it banks roughly thirty times the cumulative 2040 fleet need on its own11. So all three crossover years are null, the same shape as steppers. This is one of the rare links where the “build it from a single bloc” question has no volume sting at all. What it does not mean is that memory carries no risk. The exposure is concentration: the supply is dominated by two Korean makers plus US-HQ Micron and Japan’s Kioxia67, China’s rising share is small and export-controlled89, and the US makes almost none domestically10. That is a control-and-resilience question, who owns the fabs, not a question of whether enough memory can be built. It can, with enormous margin. The other embodiments barely register: a quadruped carries about one memory package, the same order as a humanoid, so even a fast-growing quadruped fleet of about 5.15 million by 2040 adds only a few million packages to an industry shipping billions a year, immaterial to a verdict already decided by orders of magnitude. Drones add little even at the largest fleet by units: only the autonomous roughly fifteen percent carry a companion computer with its paired memory, about fifteen-hundredths of a package per unit, so even a cumulative drone fleet of roughly four hundred and seventy-eight million by 2040 (units built, since about half are single-use military craft) adds only some seventy million packages, still immaterial.
Why it does not bind
Most links in this report bind because some deep node, precision grinding, suspended-coil winding, heavy rare earths, cannot scale fast enough. Memory has no such node at robot volumes. DRAM and NAND are made on enormous, multi-fab wafer lines measured in millions of wafer-starts a month5, turning out several billion finished packages a year against a humanoid pull of about one and a half packages per robot1, so memory is deliberately not placed in the shared precision-grinding pool that throttles roller screws, harmonic flexsplines and cross-roller raceways; its effective output equals its standalone output, with no pool throttle. The conclusion is unavoidable: there is no binding volume input to map. Two real caveats temper the “no barrier” verdict, and both are about who and when, not how many. The first is concentration: production is a Korea-led oligopoly, SK Hynix, Samsung and Micron own about ninety-two to ninety-five percent of DRAM6, the NAND top five about ninety percent7, and the United States, weakest of the major geographies, fabricates almost no commodity memory at home10, with Micron’s domestic reshoring only ramping toward the end of the decade11. China’s CXMT and YMTC are the fast-rising challengers, but they are small and under U.S. export control89, so they widen the supplier base only slowly. The second caveat is the memory cycle: memory is famously boom-and-bust, and AI is now eating the wafer base, AI is set to consume nearly a fifth of global DRAM wafer capacity in 202612, and contract DRAM prices jumped more than half in a single quarter, roughly tripling year-on-year13. That can make memory briefly expensive, even scarce, for everyone, but it is a price and allocation cycle, not a structural unit-volume choke, and crucially humanoids ride the commodity LPDDR and NAND tier3, the deepest and least-contended part of the market, not the scarce HBM. So memory earns its place in this report for completeness and for the honest record that its supply is geographically concentrated and cyclically priced; on the question this report exists to answer, can the world build enough, it is one of the clearest yeses in the set.